1. Technical Field
The present disclosure relates to a normally off power electronic component.
2. Description of the Related Art
In order to provide bridge and half-bridge structures in high-voltage switching circuits, there is an increasingly widespread use of high-performance power field-effect transistors, such as, for example, high-voltage JFETs in SiC substrate or MOSFETs in GaN substrate with high electron mobility (HEMTs, High Electron Mobility Transistors). Transistors of this kind, albeit extremely efficient and suitable for operating with voltages, for example, in the region of 600-1200 V, present, however, the disadvantage of being normally on. In other words, if a specific quenching voltage is not applied on the control terminals, normally on devices enable passage of current in the presence of a potential difference between their conduction terminals. Given the high voltages involved, it is thus possible to create risky conditions, for example, when the driving circuits that supply the control terminals are subject to malfunctioning or disturbance that prevent proper operation, even just for limited periods of time.
In order to prevent these drawbacks, normally on high-voltage transistors are frequently used in combination with a normally off low-voltage transistor, which prevents passage of current in the absence of control. The two transistors are coupled to one another in cascode configuration and are incorporated in one and the same package to form a single discrete power component. With reference, for simplicity, to N-channel field-effect transistors, the normally off low-voltage transistor has its source terminal connected to a reference-potential line (ground) and its drain terminal connected to a source terminal of the normally on high-voltage transistor. The gate terminal of the normally off transistor receives a control signal from a driving circuit, whereas the gate terminal of the normally on transistor is connected to ground. In the absence of the control signal, the normally off transistor, which is connected in series to the normally on transistor, prevents passage of current and forces turning-off of the entire discrete component.
The normally on transistor and the normally off transistor are as a rule provided in separate chips and incorporated in a single package, provided with connection terminals. The normally off transistor and the normally on transistor are carried on one and the same conductive lamina incorporated in the package and are connected together, to the conductive lamina, and to the connection terminals by wire connections.
Known solutions are, however, rather complex, both owing to insulating at least the normally off transistor from the conductive lamina and on account of the number of wire connections. Moreover, the wire connections have associated to them non-negligible parasitic inductances.
There is hence an interest in simplifying the structure of the power component so as to reduce both the wire connections and, consequently, the parasitic inductances.